This invention relates to the processing of image data acquired by a target sensor array.
Target sensing arrays carried by missiles, for example, have data processors associated therewith through which image data acquired by the sensor may be interrogated and analyzed. Interrogation of the sensor array involves sequential sampling and storing of information derived from elemental data bit areas on the array during discrete periods of time. Any increase in the number of data bit areas aligned in columns and rows on the sensor area not only involves an enlargement in the size of the array but also causes a geometric increase in data processing time with an accompanying reduction in signal bandwidth limits for the associated system and its ability to respond to specific stimulus. Accordingly, data processing time is critical and may limit use of the associated system, particularly where data resolution requirements dictate an increase in the size of the sensor array.
The use of parallel data processing techniques to reduce data processing time is generally known in the art, but heretofore involved a burdensome increase in hardware presenting another set of problems especially critical in missile installations, where weight, volume and packaging are important factors.
It is therefore an important object of the present invention to provide a data processing system for interrogating image pattern data employing a simplified hardware and parallel processing technique to reduce data processing time.